Item Tag: AM29LV065DU-120REI

Lot of 5 AMD AM29LV065DU-120REI Flash Mem Parallel 3V/3.3V 64M-Bit 8M x 8 120ns Am29LV065D 64 Megabit (8 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIOTM Control This product has been retired and is not recommended for designs. For new and current designs, S29GL064N supercedes Am29LV065D. This is the factory-recommended migration path. Please refer to the S29GL-N data sheet for specifications and ordering information. Availability of this document is retained for reference and historical purposes only. DISTINCTIVE CHARACTERISTICS ■ Single power supply operation — 3.0 to 3.6 volt read, erase, and program operations ■ VersatileIOTM control — Device generates output voltages and tolerates input voltages on the DQ I/Os as determined by the voltage on VIO input ■ High performance — Access times as fast as 90 ns ■ Manufactured on 0.23 µm process technology ■ CFI (Common Flash Interface) compliant — Provides device-specific information to the system, allowing host software to easily reconfigure for different Flash devices ■ SecSi (Secured Silicon) Sector region — 256-byte sector for permanent, secure identification through an 16-byte random Electronic Serial Number — May be programmed and locked at the factory or by the customer — Accessible through a command sequence ■ Ultra low power consumption (typical values at 3.0 V, 5 MHz) — 9 mA typical active read current — 26 mA typical erase/program current — 200 nA typical standby mode current ■ Flexible sector architecture — One hundred twenty-eight 64 Kbyte sectors ■ Sector Protection — A hardware method to lock a sector to prevent program or erase operations within that sector — Sectors can be locked in-system or via programming equipment — Temporary Sector Unprotect feature allows code changes in previously locked sectors ■ Embedded Algorithms — Embedded Erase algorithm automatically preprograms and erases the entire chip or any combination of designated sectors — Embedded Program algorithm automatically writes and verifies data at specified addresses ■ Compatibility with JEDEC standards — Pinout and software compatible with single-power supply Flash — Superior inadvertent write protection ■ Minimum 1 million erase cycle guarantee per sector ■ Package options — 48-pin TSOP — 63-ball FBGA ■ Erase Suspend/Erase Resume — Suspends an erase operation to read data from, or program data to, a sector that is not being erased, then resumes the erase operation ■ Data# Polling and toggle bits — Provides a software method of detecting program or erase operation completion ■ Unlock Bypass Program command — Reduces overall programming time when issuing multiple program command sequences ■ Ready/Busy# pin (RY/BY#) — Provides a hardware method of detecting program or erase cycle completion ■ Hardware reset pin (RESET#) — Hardware method to reset the device for reading array data ■ ACC pin — Accelerates programming time for higher throughput during system production ■ Program and Erase Performance (VHH not applied to the ACC input pin) — Byte program time: 5 µs typical — Sector erase time: 0.9 s typical for each 64 Kbyte sector ■ 20-year data retention at 125°C — Reliable operation for the life of